Forum: Finance, Legal, Policy
07-23-2012, 08:38 PM
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Replies: 115
Views: 17,645
Look at that VLIW4 CU another way. What if you...
Look at that VLIW4 CU another way. What if you picture it as a SIMD unit containing 4 vector ALUs with a single, statically structured, instruction stream to feed them. Same memory banking, same...
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Forum: Software
04-13-2012, 10:19 AM
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Replies: 51
Views: 13,904
This isn't really true. Most class methods are...
This isn't really true. Most class methods are fairly easily inlined and you end up with roughly the same code you started with. This is also true of iterators and the like. There is *no* memory...
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Forum: GPUs
09-12-2011, 10:43 AM
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Replies: 16
Views: 3,350
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Forum: GPUs
09-11-2011, 07:53 PM
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Replies: 16
Views: 3,350
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Forum: GPUs
09-10-2011, 07:56 PM
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Replies: 16
Views: 3,350
I think you're right that that's so close as to...
I think you're right that that's so close as to be meaningless. The effect is the same except maybe in terms of power saving. You wouldn't even notice the difference. The only meaningful mask is the...
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Forum: GPUs
08-27-2011, 04:55 PM
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Replies: 2,460
Views: 455,076
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Forum: GPUs
06-28-2011, 04:35 PM
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Replies: 1,523
Views: 276,121
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Forum: GPUs
06-27-2011, 06:22 PM
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Replies: 1,523
Views: 276,121
It really is. AMD describes their architecture...
It really is. AMD describes their architecture the same way. I prefer to think of AMD's architecture as a VLIW issue of 4 16-wide vector instructions rather than vice versa as they describe it. It's...
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Forum: OSes
06-06-2011, 02:15 PM
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Replies: 95
Views: 16,697
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Forum: OSes
06-06-2011, 11:14 AM
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Replies: 95
Views: 16,697
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Forum: GPUs
05-25-2011, 11:02 AM
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Replies: 2,460
Views: 455,076
It's not an implicit memory trick. GPUs are...
It's not an implicit memory trick. GPUs are vector architectures. It's like programming to AVX instead of SSE - you're locking in to the ISA provider maintaining AVX. If the provider wants to narrow...
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Forum: GPUs
05-24-2011, 09:13 AM
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Replies: 2,460
Views: 455,076
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Forum: GPUs
05-23-2011, 03:50 PM
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Replies: 2,460
Views: 455,076
It's very much a backward compatibility issue...
It's very much a backward compatibility issue because a lot of code does not quite following the OpenCL spec of treating each lane as a "thread" because the reality is that that is horrendously...
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Forum: GPUs
05-19-2011, 07:41 PM
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Replies: 2,460
Views: 455,076
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Forum: GPUs
05-19-2011, 12:52 PM
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Replies: 2,460
Views: 455,076
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Forum: GPUs
04-29-2011, 08:08 PM
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Replies: 49
Views: 6,700
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Forum: CPUs
02-21-2011, 03:55 PM
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Replies: 133
Views: 29,719
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Forum: Software
02-13-2011, 03:48 PM
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Replies: 23
Views: 8,344
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Forum: CPUs
02-10-2011, 08:15 PM
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Replies: 13
Views: 3,019
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Forum: CPUs
02-10-2011, 07:23 PM
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Replies: 13
Views: 3,019
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Forum: Article discussion
02-10-2011, 05:05 PM
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Replies: 52
Views: 6,455
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Forum: Article discussion
02-10-2011, 03:57 PM
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Replies: 52
Views: 6,455
I don't see any reason to think AMD's public...
I don't see any reason to think AMD's public fusion roadmap is less competent than, say, Intel's. It's certainly more thorough than nvidia's public roadmap. Excluding Tegra comparisons, which we know...
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Forum: Software
02-08-2011, 12:41 PM
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Replies: 23
Views: 8,344
Writing a specialised tool like that is a...
Writing a specialised tool like that is a challenge, but it clearly is the right option for a lot of companies. A high level library with efficient, future proof, code gen for multiple targets is a...
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Forum: GPUs
12-12-2010, 05:27 PM
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Replies: 25
Views: 5,298
Scatter/gather etc is too hard in an OoO...
Scatter/gather etc is too hard in an OoO pipeline, apart from general efficiency losses doing dependence analysis. I'm not sure we'll ever see that, having a few threads running is just more...
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Forum: GPUs
12-09-2010, 07:14 PM
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Replies: 2,690
Views: 457,484
Only if you look at raw numbers. Cypress is FPU...
Only if you look at raw numbers. Cypress is FPU heavy, it can easily lose a few because except in very rare cases it couldn't utilise them anyway. If Cayman uses the die area to boost primitive rate...
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