SEAN MALONEY GOT all the good toys to show off at IDF this year, with Larrabee, Jasper, Gulftown and much more. There is a lot of good silicon in the pipeline.
Larrabee and Gulftown on x58
Larrabee is the one everyone cares about, and it was shown off publicly for the first time today. The machine it was on is a six core Gulftown computer, the Westmere Exxxxxxtreme chip and ultimately next gen server CPU. It was running the traditional game Quake Wars, ported to do raytracing.
Waves moved, geometry was not static, and in general it worked. Instead of multiple four core chips, the new demo was running on the ‘GPU’, although Intel would not call it that. The only thing on the CPU was the game engine itself, exactly what you would expect from a CPU/GPU machine. As we said earlier, B0 silicon, the bug fixed Larrabee, taped out a month ago, and would possibly be shown at IDF.
Sadly, it has not come back from the fabs yet, so the demo was running on Ax silicon, most likely A6. It worked, but didn’t seem to be a huge step forward from four quad core Xeons. Oh wait, one GPU running at sub-10% of hoped for performance beating 16 Xeon cores is a huge step forward.
Nehalem EX was talked about heavily, but we won’t go over the architecture again. If you are interested, it is here. One bit Intel showed off was MCA or Machine Check Architecture. This is a Reliability/Availability/Stability (RAS) feature that allows ‘bad’ instructions to be identified and retried. Between that, buffers on board, and other RAS features, Nehalem EX must make life very hard for the Itanic folk.
Speaking of which, the soap opera that is Tukwilla is finally slated to be over in Q1 2010. Intel also said the ecosystem around IA64 Itanic now is worth more than the SPARC ecosystem. It didn’t specify if that was because IA64 sales are going up, or, like many suspect, it is more or less static and SPARC is dropping like Rock. Or a rock.
Microservers, basically a small blade
It might be a moot point because of the new high density Xeons that were introduced today, 45W and 30W 3400 series parts. The 45W should be available now, 30W CPUs in Q1. To show it off, Intel demoed a new ‘microserver’ blade design. The best size comparison I can give is that it is a full Xeon server in a space about the size of a videotape. You should be able to pack hundreds of servers in a rack with this technology, not just hundreds of cores.
Next up was Jasper Forest, the Nehalem variant with PCIe on the die. It is now tasked with being a storage device CPU, but when I first wrote it up in early 2007, it was a serious contender for mainstream use. If you imagine a quad core Nehalem server with PCIe, RAID 5 and 6, I/O virtualization, and a non-transparent bridge chip, you get the idea. It is the guts of an I/O server on a chip.
Intel seven SSD RAID on PCIe
The last thing was SSDs, and Intel is doing what OCZ, SuperTalent and many enterprise players are doing, putting multiple SSDs on a PCIe card. In this case, Intel put seven of their SSDs on a single card, and it was fast. How fast? Over a million, 1.076 million to be precise, IOPS. Intel is claiming that to get this level of performance from magnetic drives, you would need over 5,000 of them. PCIe SSDs do not have the storage capacity to replace that, but if IOPS are what you need, SSDs are the only way to go.S|A
Latest posts by Charlie Demerjian (see all)
- HyperX ships it’s 60 millionth enthusiast memory module - Oct 15, 2018
- Bittware/Nallatech water cools 300W of Xilinx FPGA - Oct 12, 2018
- More on Intel’s 10nm process problems - Sep 17, 2018
- Intel puts out another 14nm 2020 server platform - Sep 11, 2018
- Why Can’t Intel Supply Enough 14nm Xeons? - Sep 10, 2018