Jasper Forest is first Nehalem with integrated PCIe controller

Also offers storage centric features and a DMI interface

EARLIER TODAY WE attended the Intel Storage Solutions Forum 2010 in Taipei, Taiwan where Intel was presenting various technologies that it has or is developing that are meant to improve the way we deal with large amounts of data. The products range from home users to small business and all the way to the corporate sector.

However, one of the most interesting things Intel talked about was its recently launched Jasper Forest embedded Xeon processors for storage servers. Jasper Forest is based on Intel’s Nehalem architecture, yet it’s using the Ibex Peak chipset also known as the 3420 in this market space. This is the same chipset that the Lynnfield and Clarkdale processors are using and on the desktop side it’s known as the P55/H55/H57/Q57.

In other words, Jasper Forest is something of a hybrid solution from Intel, as the CPU features a built in PCI Express controller just as the Lynnfield and Clarkdale processors, but it retains the ability to use triple-channel memory like the Nehalem based Xeons. The integrated PCI Express 2.0 controller delivers 16 lanes of bandwidth that can be employed in various ways depending on the system and server configuration. One feature Intel is touting is the PCI Express Non-Transparent Bridge Failover option that takes up eight PCI Express lanes and adds a second, redundant platform inside the same server. This secondary setup will take over if the primary would fail, although this is a rather costly solution.

Intel has also added support for an IOH via QPI, which adds up 36 additional PCI Express lanes depending on the server configuration. This is an optional building block and it’s not required for the Jasper Forest platform. As this is a storage processor, Intel has also added some unusual features to the CPU, which we were told will be standard features on all Xeon processors in the future. What we’re talking about are specific features that will handle RAID acceleration. Although Intel would very much like to call it hardware RAID, it’s more akin to something that ends up in-between the “fake RAID” controllers found on many consumer motherboards and an actual hardware RAID controller.

It might be a bit mean to put it this way, but despite acceleration of RAID 5 and 6, this implementation has a few drawbacks. For starters there’s no dedicated cache, which all high-end RAID controllers feature, and secondly, depending on your server needs, part of the CPU is going to be dedicated to handling the storage array which might not be optimal under all circumstances. Nonetheless, Intel has been quite innovative, as a portion of the system memory is used as cache for the RAID array and Intel has even come up with a battery-backup solution for the system memory that is meant to prevent data loss in case of a power failure.

Intel is trying to get its partners to implement the Jasper Forest solution onto what is known as an SBB 2.0 or Storage Bridge Bay 2.0 platform. This is a rather interesting server solution that is based on modules that slot into the rear of the server, but we’ll cover some more details about this shortly.

The two CPU’s Intel was talking about were the Xeon LC3528 and the Celeron P1053. The latter is a 1.33GHz single core, dual threaded CPU with 2MB of cache and a TDP of a mere 30W. It’s intended for entry level storage servers for the corporate market. The LC3528 on the other hand is clocked at 1.73GHz and supports Intel’s Turbo technology and in poorly threaded applications it can be boosted to 2.13GHz. It has two cores, can run four threads and it also features 4MB of cache and a 35W TDP.

It’s interesting to note that Charlie predicted that Intel was going to head this way sooner or later way back at CeBIT in 2007. With Intel aiming at consolidating its server processors, as it believes that servers and storage servers are now one and the same, we can expect to see more processors from Intel in the future that have more and more storage centric features implemented to help boost overall system performance. If we’re to take anything away from today’s presentations, it has to be that Intel is dead set on getting rid of all bottlenecks possible in the storage server market.S|A

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