Invensas puts entire DIMM on a chip

CES 2013: DDR3, DDR4, GDDR5, it doesn’t matter to Invensas

Invensas logoInvensas had a novel memory package at CES, basically a DRAM version of the single chip SSD that Sandisk showed off two years ago. Instead of a full SSD in a package, this one has a full DIMM in a single chip package, and they call it DIMM-in-a-Package.

With Invensas‘ DIMM-in-a-Package, the concept is simple enough. Instead of a big, bulky DIMM, or a half of big bulky SO-DIMM, Invensas will stack between 2 and 16 DRAMs per channel in a little package that is a mere 17mm*17mm. Height is obviously dependent on the count of the DRAM dies you put in, and the technology you package them with. Whatever is on top, the pinouts are the same symmetric 243 bump package, or a smaller one for a dual die only package. They look like this.

Invensas DIMM-in-a-Package package

Top to bottom, DIMM, SO-DIMM, 4+ channel package, dual channel package

The reason this technology is needed is the same problem in many modern form factors, marketing drives things. Ultrabooks and other stupid form factors are specced out based on looks, not actual engineering, so they are compromised in every way before the first one is made. The engineers then have to claw back acceptable performance from the silly constraints they were given. While this tends to push some technological boundaries, things like Ultrabooks will never have acceptable performance by design. The conversation goes something like this.

Intel: Here are the engineering specs that marketing came up with!

Engineer: Err.. Ummm…

Intel: Do it.

Engineer: We need 4mm more height to get minimal performance. With these specs, 10% of acceptable is barely possible.

Intel: Marketing is more important than your silly concerns, make us an Ultrabook!

Engineer: But physics says this is impossible.

Intel: Marketing does not care, they have ad campaigns, slogans, and materials ready, make the product!

Engineer: OK, 10% it is.

Companies like Invensas then come up with nifty packaging solutions that make Ultrabooks suck less. Intel sees that they got 15% of bare minimum acceptable performance, and declares victory to the press. They repost it as 5% better than anticipated and somehow forget to mention that the net performance is still awful. Money does talk.

From here it gets interesting. You can have a single 64-bit channel or two 32-bit channels from the same layout. In fact, since they are symmetrically laid out, if you carefully saw one in half, you get two separate single channel devices that don’t work. Most other technologies just give you two broken parts of a non-symmetrical nature. Please note, we are only joking about the sawing bit.

Back to the tech, the layout of the I/Os are designed to be fairly flexible and future proof. You can take the same PCB and put in DDR3x, DDR4, GDDR5, and LPDDR3 without changes. On the stacking side, you can use Invensas’ QFD wirebond tech to stack the dies, conventional wirebonding, careful flip-chip arrangements, or full blown TSV stack, it all should just work. So here you have a tech that takes most if not all modern DRAM types, most if not all stacking technologies, and delivers a common pinout to work with regardless.

Better yet, DIMM-in-a-Package takes up less board space than a traditional DIMM or SO-DIMM, basically about as much as a single DRAM on a DIMM. This can simplify board design and layout by a lot, and let you pack multiple channels in to less area than a single SO-DIMM. Invensas claims a lot of cost savings, quicker time to market, and more flexibility. More importantly, it eases up one of the major performance drawbacks of marketing driven design. Overall, quite a neat solution.S|A

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Charlie Demerjian

Roving engine of chaos and snide remarks at SemiAccurate
Charlie Demerjian is the founder of Stone Arch Networking Services and is a technology news site; addressing hardware design, software selection, customization, securing and maintenance, with over one million views per month. He is a technologist and analyst specializing in semiconductors, system and network architecture. As head writer of, he regularly advises writers, analysts, and industry executives on technical matters and long lead industry trends. Charlie is also available through Guidepoint and Mosaic. FullyAccurate