We will start this by saying that Intel’s half-truths in messaging are getting quite annoying. Even when they purportedly come clean like the 7nm delay announcement on their 2Q 2020 call, we don’t think they really are. It has now become not just annoying but aggravating and the half-truths meant to convey things that can not be said outright are multiplying. The description of the Ponte Vecchio datacenter GPU was a shining example of this type of speech and also a case study in how to destroy your company’s credibility.
Why are we so annoyed at the way Ponte Vecchio was messaged on yesterday’s Q2/2020 Intel analyst call? Because of how far the company went to not say how broken things are on their process, and how much of the GPU is at TSMC now. It was intoned that much of the chip was already going to be outsourced so this is a minor change, not a big deal. It isn’t a minor change and it is a very big deal.
Lets start out with what Ponte Vecchio was. It was Intel’s first 7nm product, Intel’s first 7nm datacenter product, Intel’s first datacenter GPU, a halo product for Intel’s advanced packaging and integration, and a key component of the Aurora supercomputer bid. If you were thinking that Intel’s first 7nm datacenter product was a CPU rather than a GPU, you are forgiven because that is what Intel intoned for months. We won’t point out that this messaging was idiotic because all the pieces were out there publicly starting with the public outing of Ponte Vecchio itself last November. Why Intel kept being too clever for their own good after the official disclosure we can’t answer, it only hurt their credibility.
Things were not looking good for Ponte Vecchio long before that November outing with various reports of problems on the design and process side. There was an internal mandate to tape the chip out before the end of Q1/2020 or heads would roll, anything later and the Aurora contract would be missed and Intel would get a big, expensive, and public black eye.
They missed the tapeout date. Heads rolled. The Aurora contract is not officially missed yet so the expense can still be papered over but the black eye happened during the Q2/2020 analyst call. OK, one of them happened then, several more are sure to follow.
Lets do a bit of parsing of the words used to describe Ponte Vecchio, Bob Swan on the call said, “Yes. On Ponte Vecchio, originally the architecture of Ponte Vecchio includes an I/O based die, connectivity, a GPU, and some memory tiles, all kind of packaged together. That’s kind of the design of Ponte Vecchio. From the beginning we would do some of those tiles inside and some of those tiles outside, and again leverage the packaging technology as a proof point of how we do mix and match different designs in to one package. So that was the design from the beginning.“
It sure sounds like they were going to do a lot of it outside from day one and the 7nm delay is a minor blip in the process, right? Well lets take a look at this in detail. There are three chips that make up Ponte Vecchio (PVC), an I/O die, GPU dies, and memory stack, likely HBM. Like AMD’s Rome, the I/O die isn’t very sensitive to process nodes so doing it on a trailing node isn’t a big deal. The GPU side is very power sensitive, trivially parallel workloads like the ones GPUs are tasked with are all about performance per Watt.
PV’s GPU die were the ideal candidate for Intel’s 7nm process which is why they were chosen to be the lead 7nm product, process was critical for these parts, so critical that it is unlikely that Intel can meet the specs of the Aurora contract if PVC’s GPU die are on another process. If you haven’t guessed by now if PV is slated to ship in late 2021 or early 2022 as was said on the call and the first 7nm products aren’t coming out for another year…. well the math isn’t hard.
The last bit is the memory die, likely HBM or some proprietary equivalent. Those are definitely not made by Intel and were never going to be. You have three die, one definitely made by Intel, one definitely not, and one that could go either way but it’s process and foundry aren’t terribly important to the project.
Intel really tried hard to make it seem like any change to PVC was a trifle, a mere blip that no one will notice and not really a change from the pre-7nm meltdown plan. Don’t be fooled. To start out with the memory die was never made at Intel so if the other two were, the statements on the call would pass legal scrutiny. This was very likely the case with the I/O die being made on an older process, likely 14nm because that is good enough to do the job and unlike 10nm, can actually make tolerable yields.
The GPU die is obviously not 7nm any more, schedules alone tell you that isn’t happening. The DRAM dies were never Intel, and the I/O die could be nearly anything without causing problems. So what is Ponte Vecchio now?
Note: The following is for professional and student level subscribers.
Disclosures: Charlie Demerjian and Stone Arch Networking Services, Inc. have no consulting relationships, investment relationships, or hold any investment positions with any of the companies mentioned in this report.
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